Semiconductor Capacitance Extraction & Linearization Tool
The Semiconductor Capacitance Extraction & Linearization Tool is a Python-based engineering application developed to extract voltage-dependent capacitance characteristics directly from semiconductor datasheet plots. The tool combines interactive graph calibration, computer-vision-assisted curve tracing, coordinate transformation, and numerical analysis into a single workflow.
The extraction process follows a human-in-the-loop approach because datasheet plots can contain overlapping curves, steep nonlinear regions, logarithmic axes, and different plotting conventions. The user defines the graph boundaries and physical axis values, with each axis selectable as linear or logarithmic, and places seed points along the target curve. A live magnifier assists point placement, while each seed is refined using a 3×3 intensity-weighted centroid calculation that gives greater weight to darker curve pixels.
The datasheet image is converted to grayscale and thresholded to create a binary ink mask. Consecutive seed points are connected using an 8-connected Breadth-First Search (BFS), allowing the traced path to follow steep and highly nonlinear sections instead of simply interpolating between selected points. The extracted pixel coordinates are then mapped to physical voltage and capacitance values using the calibrated graph axes.
The extracted Coss(V) data is sorted and cleaned before energy- and charge-equivalent capacitances are calculated through trapezoidal numerical integration. If needed, the first extracted capacitance value is extended to 0 V to define the integration boundary. The raw curve remains unsmoothed, results are exported to CSV, and a trace-validation overlay supports visual verification against the original datasheet.